1. Field of the Invention
The invention relates to integrated circuit capacitors having integral protection from charging damage, and integrated circuits containing such capacitors.
2. Description of the Related Art
Reliable and highly yielding capacitors are a basic requirement for the creation of many types of electronic circuit. Modem technology allows the integration of many types of device on a single integrated circuit (IC) chip. Building capacitors on the IC chip may be a problem due to the interaction of the component with the process manufacturing equipment. Large RF fields and heavy influx of ions may cause the capacitor plates to become charged. Charge may leak very slowly from the capacitor but this may be at a slower rate than the arrival of more charge. As the charging continues the voltage increases until electrical breakdown of the capacitor dielectric occurs. This breakdown may cause catastrophic failure of the dielectric resulting in a short circuit between the capacitor plates which destroys the component. Very thin dielectrics are able to conduct more current before they become damaged.
The area used by capacitors is very large compared to other electronic components. Larger areas increase the size of the final integrated circuit and make it more costly to manufacture. Yields of an IC are dictated by the size. To reduce the area, the capacitance per unit area needs to be maximised. This is accomplished by creating capacitors from more than one physical conductor plate, with the plates stacked on top of each other. Dielectric layers between the plates must have the smallest possible thickness. This also changes the tolerance to high voltages between the plates because the breakdown voltage is proportional to the thickness of the dielectric. The plates are connected together in the final component so that the capacitance per unit area is maximised and the component has two connection terminals: plus and minus.
Using a combined layer capacitor, the problem of damage encountered through the fabrication process is increased because any charge on the topmost conductor plate must find a leakage, or breakdown path to the underlying wafer substrate. Charges that may pass through the lower dielectric without causing damage may destroy the dielectric situated above. The connections between the capacitor plates occurs late in the fabrication sequence, hence it is very difficult to arrange other devices which could connect to the plates and limit the voltage experienced by it. For example, other inventors have utilised reverse biased diodes, which are connected to each plate for this purpose. However the diode is only effective when physically connected to the plate at the metallisation stages of the device fabrication. Charging related voltage build-up occurring earlier (eg at implantation, resist strip and etch) are not avoided using this technique. The invention seeks to protect the device at these earlier stages.
It is desirable for large value, compact, high yielding integrated circuit capacitor to:                a) have a large capacitance per unit area;        b) utilise more than two conductor plates;        c) use very thin dielectric layers between the plates; and        d) be able to survive device charging encountered during the fabrication process.        